报告简介:
For decades, Moore’s Law and its partner Dennard Scaling have driven technology trends that have enabled exponential performance improvements in computer systems at manageable power dissipation. With the slowing of Moore/Dennard improvements, designers have turned to heterogeneous parallelism and specialized accelerators as levers for extending scaling of computer systems performance and power efficiency. Unfortunately, these techniques have also degraded hardware-software abstraction layers, have increased complexity at the hardware-software interface, and are triggering increased challenges for software reliability, interoperability, and performance portability.
This talk will explore the ways forward for computer systems designers in this “Post-ISA” era of shifting abstractions. I will discuss the opportunities and challenges of accelerator-oriented parallelism, and I will also discuss my group’s recent work on formally specifying and verifying hardware-software interface behaviors in order to regain lost benefits of abstraction. The tools we have developed (check.cs.princeton.edu) have been used to find bugs in existing and proposed processors and in commercial compilers. They have also been used to identify shortcomings in the specifications of high-level languages (C++11) and instruction set architectures (RISC-V), and they can be extended to Internet-of-Things (IoT) and distributed systems as well. To conclude the talk, I will discuss more forward-looking technologies such as Quantum Computing―both the promise they hold and the role that computer systems researchers can play in making them happen.
报告人简介:
Margaret Martonosi is the Hugh Trumbull Adams '35 Professor of Computer Science at Princeton University, where she has been on the faculty since 1994. She is also currently serving a four-year term as Director of the Keller Center for Innovation in Engineering Education. Martonosi holds affiliated faculty appointments in Princeton EE, the Center for Information Technology Policy (CITP), the Andlinger Center for Energy and the Environement, and the Princeton Environmental Institute. She also holds an affiliated faculty appointment in Princeton EE. From 2005-2007, she served as Associate Dean for Academic Affairs for the Princeton University School of Engineering and Applied Science. In 2011, she served as Acting Director of Princeton's Center for Information Technology Policy (CITP). From August 2015 through March, 2017, she served as a Jefferson Science Fellow within the U.S. Department of State.
Martonosi's research interests are in computer architecture and mobile computing, with particular focus on power-efficient systems. Her work has included the development of the Wattch power modeling tool and the Princeton ZebraNet mobile sensor network project for the design and real-world deployment of zebra tracking collars in Kenya. Her current research focuses on hardware-software interface approaches to manage heterogeneous parallelism and power-performance tradeoffs in systems ranging from smartphones to chip multiprocessors to large-scale data centers.
Martonosi is a Fellow of both IEEE and ACM. Notable awards include the 2010 Princeton University Graduate Mentoring Award, the 2013 NCWIT Undergraduate Research Mentoring Award, the 2013 Anita Borg Institute Technical Leadership Award, the 2015 Marie Pistilli Women in EDA Achievement Award, the 2015 ISCA Long-Term Influential Paper Award, and the 2017 ACM SIGMOBILE Test-of-Time Award. In addition to many archival publications, Martonosi is an inventor on seven granted US patents, and has co-authored two technical reference books on power-aware computer architecture. She has served on the Board of Directors of the Computing Research Association (CRA), and will co-chair CRA-W from 2017-2020. Martonosi completed her Ph.D. at Stanford University, and also holds a Master's degree from Stanford and a bachelor's degree from Cornell University, all in Electrical Engineering.